SAINT

SAINT에서는 워싱턴 대학교 배상훈 교수님을 모시고 세미나를 개최합니다. 

많은 관심 부탁드립니다.

○ 주제 : Materials Challenges Towards 3D Electronics

○ 대상 : 학부생, 대학원생 누구나

○ 일시 : 12월 31일 11시 ~ 1시

○ 장소 : 김영진 첨단강의실 (83188호)

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□ Title

  Materials Challenges Towards 3D Electronics

□ Abstract

The transition from planar electronics to truly three-dimensional (3D) architectures represents one of the most profound shifts in semiconductor history. Achieving this vision requires more than stacking conventional chips; it demands a new materials toolbox capable of addressing fundamental challenges in epitaxy, stress management, defect control, and thermal transport. As device dimensions shrink and interconnect densities increase, lattice-mismatched heterointegration, interfacial strain, and heat dissipation become critical roadblocks that cannot be solved by silicon scaling alone.

Emergent material systems such as freestanding crystalline nanomembranes and 2D materials are redefining the design space for 3D electronics. These materials offer substrate decoupling, tunable polarization and band structures, and the possibility of fabricating artificial heterostructures with atomic precision. Yet, realizing their full potential requires breakthroughs in synthesis, wafer-scale release, and defect-free stacking, as well as new paradigms for electronic, optical, and thermal co-design. In this talk, I will discuss the key material and integration challenges that must be solved to enable monolithic 3D electronics. I will highlight recent advances in remote epitaxy, controlled nanomembrane release, and deterministic stacking that open opportunities for quantum-enabled devices, high-bandwidth photonic links, and AI accelerators. Together, these approaches point toward a future where materials engineering—not just transistor scaling—becomes the primary driver of Moore’s Law in the 3D era.

Keyword: 3D electronics, monolithic 3D integration, 2D materials